EARLIER, WHEN DISCUSSING the possible integration of CPUs and GPUs on the system level, at least for high end systems, before the chip-level "sharing the die 'til we die" CPU-GPU on-die marriage happens, we looked into the most efficient ways of executing that integration.

Obviously, PCI Express, even in its v2 and upcoming v3 versions, has too much latency and protocol baggage to most efficiently link CPUs and GPUs for working together on common tasks. Merely seamless coherent memory access is usually a big problem.

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